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MAO Wei

Research Assistant Professor
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Dr. Wei Mao received the B.Eng. and Ph.D. degree in electrical engineering from Southeast University in 2011 and National University of Singapore (NUS) in 2017, respectively. From 2016 to 2017, he was a research engineer with NUS, focusing on low-power IC research. From 2017 to 2019, he was an analog IC designer with HiSilicon Technologies Co., Ltd., working on 5G communication IC design and manufacture. Since Dec. 2019, he has been with Southern University of Science and Technology (SUSTech) as a Research Assistant Professor.

His research interests include mixed-signal integrated circuits, and AI hardware accelerator. He has published more than 10 papers in top-notch journals and leading international conferences, such as TCAS-I, TVLSI, TBioCAS, EL and ISCAS. He also serves as a journal reviewer for TCAS, TVLSI, TBioCAS, Science China and so on.

E-mail: maow@sustech.edu.cn

Educational Background

2012–2017, National University of Singapore, Ph.D
2007–2011, Southeast University, bachelor

Professional Experience

2019.12-now, Southern University of Science and Technology, Research Assistant Professor
2017.09-2019.12, HiSilicon Technologies Co., Ltd., IC design engineer
2016.07-2017.07, National University of Singapore, research engineer

Research Interests

Mixed-signal chip design:
High-speed High-resolution ADDA, Low-power analog circuit and system;
AI chip design:
Low-power data flow, high energy-efficient PE, Network optimization algorithm.

Honors & Awards

2019, Star of Hisilicon Award
2018, Shenlong High-level Talent of Longgang District, Shenzhen
2018, Overseas High-Caliber Personnel of Shenzhen

Selected Publication

Journal Papers:
Yuxuan Luo, Kok-Hin Teng, Yongfu Li, Wei Mao, Yong Lian and Chun-Huat Heng, “A 74-μW 11-Mbps Wireless Vital Signs Monitoring SoC for 3-Lead ECG, Respiration Rate, and Body Temperature,” IEEE Trans. Biomed. Circuits Syst., vol. 13, no. 5, pp. 907-917, Jun. 2019.
Wei Mao, Yongfu Li, Chun-Huat Heng and Yong Lian, “A low power 12-bit 1-kS/s SAR ADC for biomedical signal processing,” IEEE Trans. Circuits Syst. I, vol. 66, no. 2, pp. 477-488, Feb. 2019.
Wei Mao, Yongfu Li, Chun-Huat Heng and Yong Lian, “High dynamic performance current-steering DAC design with nested-segment structure,” IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 26, no. 5, pp. 995-999, May 2018.
Wei Mao, Yongfu Li, Chun-Huat Heng and Yong Lian, “An area efficient non-fractional binary-weighted split-capacitive-array DAC for successive-approximation-register ADC,” IET Electronics Letters, vol. 53, no. 7, pp. 452-454, Mar. 2017.

Coference Papers:
Yuxuan Luo, Kok-Hin Teng, Yongfu Li, Wei Mao, Yong Lian and Chun-Huat Heng, “A 93μW 11Mbps wireless vital signs monitoring SoC with 3-lead ECG, bio-impedance, and body temperature,” Proc. IEEE Asian Solid-State Circuits Conf. (A-SSCC), pp. 29-32, Dec. 2017.
Wei Mao, Yongfu Li, Chun-Huat Heng and Yong Lian, “Zero-bias true random number generator using LFSR-based scrambler,” Proc. IEEE Int. Symp. Circuits Syst. (ISCAS), pp. 1-4, May 2017.
Wei Mao, Yongfu Li, Chun-Huat Heng and Yong Lian, “Dynamic mapping method for static and dynamic performance improvement on current-steering digital-to-analog converter,” Proc. IEEE Asia Pacific Conf. Circuits Syst. (APCCAS), pp. 336-339, Oct. 2016.
Lei Wang, Wei Mao, Chundong Wu, Alan Chang and Yong Lian, “A fast transient LDO based on dual loop FVF with high PSRR,” Proc. IEEE Asia Pacific Conf. Circuits Syst. (APCCAS), pp. 99-102, Oct. 2016.
Chundong Wu, Wang Ling Goh, Wei Mao, Lei Wang, Yat Hei Lam, Alan Chang and Yong Lian, “A self-biased full range current sensor for buck regulator,” Proc. IEEE Asia Pacific Conf. Circuits Syst. (APCCAS), pp. 87-90, Oct. 2016.
Yongfu Li, Wei Mao, Zhe Zhang and Yong Lian, “An ultra-low voltage comparator with faster comparison time and reduced offset voltage,” Proc. IEEE Asia Pacific Conf. Circuits Syst. (APCCAS), pp. 407-410, Nov. 2014.